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STATES (No Fresh H1B at this time)
Skill sets in a glance: C, C++,
Real-time embedded, Telecom, Clear Case Administrators, Networking, Quality
Assurance, Test Engineers, Voip, TCP/IP, Wireless, SNMP, ATM, CAD/CAM, Pro-E,
PLC etc. See below for more details.
The goal of an interview is to just get an
offer. PERIOD. Make the decision whether to accept the offer once you've
received it. It sounds so simple. But it's also easy to do the wrong thing and
lose an offer that you'd otherwise get. All of these stories are true. Read
on
Immediate Requirements (For
Candidates who already have H1Bs.. Sub-contractors welcome):
Last Update
on January 21, 2002
SG Validation Engineer – The purpose of the position is to perform product
testing and validation functions on the ADC (ESD) Signaling Gateway.
Responsibilities include: Create test plans, and procedures based upon specifications. Create test
programs to supplement, improve, and/or replace manual testing. Create problem documentation for all problems found during test cycles.
Interface with TAC, development engineering, and customers to provide necessary testing support.
As needed, may be called upon to support customer installation of ADC ESD (Shelton) products.
Candidates must have demonstrated competence and technical expertise in one or more of the following areas:
· Telecommunications
· SS7 Stack especially ISUP and TCAP
· Protocol Compliance
· Call Processing
· TCP/IP
· Software Engineering
· Programming and Scripting – Especially writing C test tools for testing
APIs. (C, C++, Perl, Tcl/Tkl)
· Unix
· ISO9000 Familiarity
· Test Plan/Case creation and execution techniques
· Black Box testing
· Performance/Stress testing
· Functional testing
· Boundary testing
· Regression testing
· Troubleshooting
· Creative Problem solving
· Ingenuity
· Systems Integration
· Network Communications
· Platforms (Sun, Motorola)
· Operating Systems(Solaris, AIX)
It is not mandatory, but is highly desirable, for candidates to have demonstrated competence and technical expertise in one or more of the
following areas:
· Gateway and Gateway Client testing
· Familiar with IETF Standards
· Familiar with Sigtran Stack ( M3UA and SCTP )
· Knowledgeable with User Adaptation Layers such as M2UA, M3UA, and SUA.
· Knowledgeable with some testing tools such as INET, TEKELEC, etc…
· SQA (Software Quality Assurance)
· Test Practices and Procedures
· Test Metrics Methodology
· Validation & Verification
Send Resume
Automotive Embedded Software Engineers,
programmers:
Qualifications: BS/MS, Excellent Programming skills in C/C++, Assembly. Experience
in automotive industry is a must. Knowledge of Micro controllers, any
Real-time Operating system or Kernels, debuggers is needed. Knowledge of
automotive protocols like CAN, KWP2000 etc is a PLUS. submit Resume
Automotive Embedded Sr. Software Engineers, Lead Engineers:
Qualifications: BS/MS, Excellent Programming skills in C/C++, Assembly. Experience
in automotive industry is a must. At least 3 years experience in Micro controllers,
any Real-time Operating system or Kernels, debuggers is needed. Knowledge of
automotive protocols like CAN, KWP2000 etc is a PLUS. and in addition
knowledge of designing Software systems for Engine Control, Climate control, Car
Audio/radio, ABS, Airbags etc is also required.
submit Resume
ASIC DESIGN MANAGER/LEAD
Qualifications
· 7+ years experience in development and verification of ASICs from concept to
silicon.
· Experience designing microprocessors, graphics geometry engines or network
controllers a plus.
· Must "hands-on" with Verilog, Synopsys DC, scripting, static timing
analysis and verification methodologies.
· Must have experience in hiring, project and team management and a
demonstrated record of leading a technical design team to several successful
products.
· BSEE or BSCS degree. MSEE preferred.
Job Description
As the ASIC Design Manager, you will be responsible for development of Nazomi's
chips for wireless platforms. You will also be responsible for hiring and
managing the design process from conception to production silicon. Your duties
will include Verilog design, functional verification, synthesis, timing
analysis, and micro architecture submit Resume
SENIOR ASIC DESIGN ENGINEER
Qualifications
· 5+ years experience in developing several ASICs from concept to silicon.
· Experience designing microprocessors, graphics geometry engines or network
controllers a plus.
· Must be proficient with Verilog, Synopsys DC, scripting, static timing
analysis and verification methodologies.
· Experience developing functional specs from architectural and requirements
documents
· BSEE or BSCS degree. MSEE preferred.
Job Description
As Senior ASIC Design Engineer you will be responsible for leading a small
team to design, verify and integrate Nazomi's JSTAR technology into chips for
wireless platforms. Your duties will include Verilog coding, functional
verification, synthesis, timing analysis, and micro architecture submit Resume
ASIC DESIGN ENGINEER
Qualifications
· Two plus years experience in developing high-speed ASICs.
· Must be proficient with Verilog, Synopsys DC, scripting, static timing
analysis and verification methodologies from concept to working silicon.
· Experience with micro architecture development and designing microprocessors,
graphics geometry engines or network controllers a plus. · BSEE or BSCS degree.
MSEE preferred
Job Description
As an ASIC Design Engineer you will be responsible for working with a small team
to design, verify, and integrate Nazomi's JSTAR technology to work with industry
leading RISC/CISC microprocessor cores. Your duties will include Verilog coding,
functional verification, synthesis, timing analysis, and micro architecture submit
Resume
SENIOR VERIFICATION ENGINEER
Qualifications
· Minimum 7 years experience in ASIC verification, preferably in a lead role.
· Strong working knowledge of Verilog/VHDL, C/C++, Vera, PLI and Perl.
· Fluent in RTL-level model development and simulation required.
· BS/MS in Electrical Engineering or Computer Science.
Job Description
As a Senior Verification Engineer, you will be responsible for defining our
verification strategy, designing our simulation environment and developing our
test methodology. You will specify IC test bench architectures and test plans.
You will develop behavioral models, UNIX shell (or PERL/C) tools for testing.
Experience with microprocessor verification is a plus. submit Resume
ACRO Corporation, Michigan USA, is looking
for a Resident Sales person in Germany: We'd
like someone who is already living/authorized to work in Germany and who speaks
both English and German fluently. They should have a University Degree and
2 years business to business sales experience preferably in IT, engineering
consulting and/or staffing services. Submit
Resume
Immediate Requirements (For
Candidates who already have H1Bs.. Sub-contractors welcome):
1) Hardware Engineering Team
Leader – Board Design
– (BSEE or equivalent – 10 yrs experience – 5 in communications industry
– 3 to 5 yrs of leadership experience). The candidate will lead a team of 4-6
logic & signal integrity
hardware engineers in the design & release of printed circuit boards. The
candidate must know high speed logic design, have experience with 100+ MhZ
buses, high speed backplanes and clock distribution; system level design;
knowledge of PCB lay out rules; experience working with and managing PCB layout
houses; DFx, scan, ICT, diagnostic strategies; high speed memory design;
experience with 10/100 enet, 1GB enet, DS-3, OC-3, OC-12, OC-48,
OC-192, DWDM are desireable; must have a solid knowledge base in signal
integrity, Viewlogic, Hspice and Allegro. submit Resume
2) Senior Hardware Design Verification Engineer
– (BSEE or equivalent and 3+ yrs experience)
– the candidate must design verification of boards, FPGA’s and ASIC’s; the
position includes design verification environment development as well as
directed and random test wiring; the candidate must have some networking
background and working knowledge of Verilog or VHDL;
experience with Vera or Verilog PLI is desireable; familiarity with C++ or any
other Object Oriented programming language is essential for those not familiar
with Vera. submit Resume
3) Design Verification Team Lead
– the candidate will lead a team of logic engineers in the design verification
of a complex communication system; must posses strong experience in the
verification of boards, FPGA’s and ASIC’s; candidate will guide the team in
tools selection, test plan creation, test methodologies, execution & closure
of test plans; will work closely with design team to come up with strategies to
enhance test coverage; design verification experience of a networking product is
a strong plus; working knowledge of Verilog or VHDL and experience with VERA or
Verilog PLI is required; familiarity with C++ or any other Object Oriented
programming language is essential for those not familiar with Vera. submit Resume
4) Senior Hardware Technician
– ( Associates degree in EE or equivalent with 5 yrs of system and board level
support in developmental environment)
- responsibilities include test, debug & system support for complex
communication gear; support design activities in the hardware lab for board
bring-up, verification, prototype development and board debug; special emphasis
on supporting the system thru system qualification; strong debug skills of
complex digital boards at the component level is required. submit Resume
New one from Software Pundits: Senior
PCB Design Engineer
Immediate project need for a senior PCB Design Engineer familiar with digital
design/FPGA architecture. Will handle full board level design responsibilities -
placement, routing, verification and specification. Excellent work
location/environment - don't let this one get away! submit Resume
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